1. Field of the Invention
The present invention relates generally to the formation of contacts in integrated circuits, and more specifically to a method for forming interlevel aluminum contacts.
2. Description of the Prior Art
In semiconductor integrated circuits, formation of metal interconnect layers is important to the proper operation of these devices. Metal interconnect signal lines make contact to lower conductive layers of the integrated circuit, including the surface of the silicon substrate, through vias in an insulating layer. For best operation of the device, the metal used to form the interconnect layer should completely fill the via.
Because of its physical and electrical properties, aluminum is especially suited for fabrication of metal interconnect lines in integrated circuits. However, the sputtering process used to apply aluminum thin film layers to an integrated circuit generally results in less than ideal filling of contact vias. Large aluminum grains tend to form on the upper surface of the insulating layer. Those grains which form at the edges of the contact via tend to block it before aluminum has a chance to completely fill the via. This results in voids and uneven structures within the via.
This problem is especially acute as integrated circuit devices are fabricated using smaller geometries. The smaller contacts used in these devices tend to have a larger aspect ratio (height to width ratio) than larger geometry devices, which exacerbates the aluminum filling problem.
The uneven thickness of the aluminum layer going into the via, caused by the step coverage problem just described, has an adverse impact on device functionality. If the voids in the via are large enough, contact resistance can be significantly higher than desired. In addition, the thinner regions of the aluminum layer will be subject to the well known electromigration problem. This can cause eventual open circuits at the contacts and failure of the device.
Many approaches have been used to try to ensure good metal contact to lower interconnect levels. For example, refractory metal layers have been used in conjunction with the aluminum interconnect layer to improve conduction through a via. Sloped via sidewalls have been used to improve metal filling in the via. The use of sloped sidewalls is becoming less common as device sizes shrink because the sloped sidewalls consume too much area on a chip.
Even with these techniques, the problems of completely filling a via with aluminum are not solved. In part this is because aluminum is deposited at temperatures which tend to encourage fairly large grain sizes. Voids and other irregularities within the contact continue to be problems with current technologies.
One technique which has been proposed to overcome the via filling problem is to deposit the aluminum interconnect layers at a temperature between 500.degree. C. and 550.degree. C. At these temperatures, the liquidity of the aluminum is increased, allowing it to flow down into the vias and fill them. This technique is described, for example, in DEVELOPMENT OF A PLANARIZED Al--Si CONTACT FILLING TECHNOLOGY, H. Ono et al, June 1990 VMIC Conference proceedings, pages 76-82. This references teaches that temperatures below 500.degree. C. and above 550.degree. C. result in degraded metal filling of contact vias. It is believed that use of such a technique still suffers from problems caused by large grain sizes.
Another technique for improving metal contact step coverage is described in U.S. Pat. No. 5,108,951 issued to Chen et al, entitled METHOD FOR FORMING A METAL CONTACT. This patent describes a technique for depositing aluminum at low deposition rates within a specified temperature range. The temperature is ramped up from a temperature below approximately 350.degree. C. while aluminum is being deposited. The teachings of this patent provide for deposition of the majority of the depth of the aluminum layer at a temperature between approximately 400.degree.-500.degree. C. at relatively low deposition rates.
The teachings of the Chen patent provide improved step coverage deposition for aluminum contacts. However, the described technique still suffers from random voiding, which is believed to be caused by relatively large grain sizes, or initial film nucleation which are deposited at the temperatures described.
Many other variations to the deposition of aluminum have been proposed and used in integrated circuit devices. Until now, all have suffered to some degree from less than ideal via filling. Because of the nature of the deposition process, it appears that relatively minor modifications in the technology used to form the aluminum interconnect can have important effects on the end result. What is heretofore lacking is a complete process which adequately provides for complete aluminum fill of the contact via.
It would be desirable to provide a technique for depositing aluminum thin film layers on an integrated circuit so as to improve coverage in contact vias. It is further desirable that such a technique be compatible with current standard process flows.